======================================================================== 74F251 8-INPUT MULTIPLEXER (WITH 3-STATE OUTPUTS) ======================================================================== Family: Fairchild FAST (Advanced Schottky TTL) Source: 1980 Fairchild FAST Data Book, pages 4-73 ... 4-75 Status: PRELIMINARY -- page 4-73 carries a "Preliminary" watermark. Ratings: Vcc = +5.0 V +/-5%, TA = 0 to +70 deg C DESCRIPTION ----------- The 'F251 is a high speed 8-input digital multiplexer. It provides, in one package, the ability to select one bit of data from up to eight sources. It can be used as universal function generator to generate any logic function of four variables. Both assertion and negation outputs are provided. o Multifunctional capability o On-chip select logic decoding o Inverting and non-inverting 3-state outputs FUNCTIONAL DESCRIPTION ---------------------- This device is a logical implementation of a single-pole, 8-position switch with the switch position controlled by the state of three Select inputs, S0, S1, S2. Both assertion and negation outputs are provided. The Output Enable input (/OE) is active LOW. When it is activated, the logic function provided at the output is: Z = /OE * ( I0*/S0*/S1*/S2 + I1*S0*/S1*/S2 + I2*/S0*S1*/S2 + I3*S0*S1*/S2 + I4*/S0*/S1*S2 + I5*S0*/S1*S2 + I6*/S0*S1*S2 + I7*S0*S1*S2 ) When the Output Enable is HIGH, both outputs are in the high impedance (high Z) state. This feature allows multiplexer expansion by tying the outputs of up to 128 devices together. When the outputs of the 3-state devices are tied together, all but one device must be in the high impedance state to avoid high currents that would exceed the maximum ratings. The Output Enable signals should be designed to ensure there is no overlap in the active LOW portion of the enable voltages. CONNECTION DIAGRAM (16-pin DIP) ------------------------------- Pin Function Pin Function --- --------------------------------------------- --- ------------------------ 1 I3 Multiplexer input 3 16 Vcc 2 I2 Multiplexer input 2 15 I4 Multiplexer input 4 3 I1 Multiplexer input 1 14 I5 Multiplexer input 5 4 I0 Multiplexer input 0 13 I6 Multiplexer input 6 5 Z Multiplexer output 12 I7 Multiplexer input 7 6 /Z Complementary output 11 S0 Select input 0 7 /OE 3-State Output Enable Input (Active LOW) 10 S1 Select input 1 8 GND 9 S2 Select input 2 TRUTH TABLE ----------- /OE S2 S1 S0 /Z Z --- -- -- -- --- --- H X X X Z Z L L L L /I0 I0 L L L H /I1 I1 L L H L /I2 I2 L L H H /I3 I3 L H L L /I4 I4 L H L H /I5 I5 L H H L /I6 I6 L H H H /I7 I7 H = HIGH voltage level; L = LOW voltage level; X = immaterial; Z = high impedance. INPUT LOADING / FAN-OUT ----------------------- Pin Names Description U.L. HIGH/LOW --------- ---------------------------------------- ------------- S0 - S2 Select Inputs 0.5 / 0.375 /OE 3-State Output Enable Input (Active LOW) 0.5 / 0.375 I0 - I7 Multiplexer Inputs 0.5 / 0.375 Z Multiplexer Output 25 / 12.5 /Z Complementary Multiplexer Output 25 / 12.5 DC CHARACTERISTICS OVER OPERATING TEMPERATURE RANGE --------------------------------------------------- Symbol Parameter Typ Units ------ --------------------------------- ---- ----- Icc Power Supply Current, outputs ON 10 mA Icc Power Supply Current, outputs OFF 10.5 mA Conditions: outputs ON -- In, Sn = 4.5 V; /OE = Gnd; Vcc = Max outputs OFF -- /OE, In = 4.5 V; Vcc = Max AC CHARACTERISTICS ------------------ Symbol Parameter Min Typ Max Units ---------- --------------------------------- --- --- --- ----- tPLH Propagation Delay Sn to /Z -- 6.3 -- ns tPHL Propagation Delay Sn to /Z -- 6.2 -- ns tPLH Propagation Delay Sn to Z -- 8.1 -- ns tPHL Propagation Delay Sn to Z -- 7.9 -- ns tPLH Propagation Delay In to /Z -- 2.9 -- ns tPHL Propagation Delay In to /Z -- 2.8 -- ns tPLH Propagation Delay In to Z -- 4.7 -- ns tPHL Propagation Delay In to Z -- 4.5 -- ns tPZH, tPZL Output Enable Time /OE to /Z -- -- -- ns tPZH, tPZL Output Enable Time /OE to Z -- -- -- ns tPHZ, tPLZ Output Disable Time /OE to /Z (1) -- -- -- ns tPHZ, tPLZ Output Disable Time /OE to Z (1) -- -- -- ns (1) Disable times measured with CL = 5 pF.